Infrastructure · INF
Hardware Engineering
Design silicon and systems for AI.
- Design accelerators and boards
- Validate performance and thermals
- Partner with vendors closely
100 open87 of 100 list compensation: $60k–$625k
807 open roles
TTenstorrent · Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States +3 · Onsite · Aug 2024
Own blocks from synthesis to tapeout for industry-leading CPU and AI architectures.
TTenstorrent · Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States +3 · Onsite · Jul 2025
Drive timing closure for complex, high-performance chip designs.
TTenstorrent · Bengaluru, Karnataka, India +1 · Onsite · Sep 28
Work on high-performance CPU/SOC and AI chips at leading-edge nodes.
TTenstorrent · Austin, Texas, United States; Santa Clara, California, United States +2 · Onsite · Sep 28
Lead first-silicon bring-up of RISC-V CPU-based SoCs to production.
TTenstorrent · Austin, Texas, United States +1 · Onsite · Sep 2025
Lead pre-silicon verification of Beowulf SoC across compute, DDR and Fabric NoC.
TTenstorrent · Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States +1 · Onsite · May 4
Own high-performance partitions for an industry-leading AI SoC end to end.
TTenstorrent · Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States +3 · Onsite · Oct 1
Ensure AI silicon behaves predictably running real workloads in real systems.
TTenstorrent · Toronto, Ontario, Canada +1 · Onsite · Apr 22
Own technical relationships with strategic customers for custom AI silicon programs.
TTenstorrent · Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States +3 · Onsite · Sep 22
Converge multi-million-gate AI designs on advanced process nodes to tapeout.
TTenstorrent · Santa Clara, California, United States +1 · Onsite · Sep 28
Own full-custom layout of high-speed analog blocks for next-gen AI silicon.
TTenstorrent · Austin, Texas, United States; Belgrade, Serbia; Toronto, Ontario, Canada; Zürich, Switzerland +1 · Onsite · Oct 2023
Validate custom Tensix AI compute cores and chiplet architectures for AI workloads.
TTenstorrent · Toronto, Ontario, Canada +2 · Onsite · Feb 2025
Guide top-tier verification team shaping strategies for next-gen AI core.
TTenstorrent · Munich, Germany · Onsite · Feb 28
Help deliver next-generation chiplet SoCs for automotive products.
TTenstorrent · Austin, Texas, United States; Belgrade, Serbia; Toronto, Ontario, Canada +3 · Onsite · Aug 12
Own physical implementation of AI accelerator IP from synthesis to GDSII signoff.
TTenstorrent · Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada +4 · Onsite · Mar 4
Design and validate high-bandwidth links for large-scale AI training clusters.
TTenstorrent · Tokyo, Japan +1 · Onsite · Nov 2024
Design and integrate multiple chiplets into a System-in-Package project
TTenstorrent · Toronto, Ontario, Canada +2 · Onsite · Oct 2024
Define and optimize high-performance SoC architectures for next-gen AI workloads.
MMidjourney · San Francisco · Onsite · Aug 24
Design structures, mechanisms and electromechanical systems end to end.
MMidjourney · San Francisco Bay Area Hybrid · Remote · Sep 7
Develop revolutionary quantum hardware technologies at Midjourney.
MMidjourney · San Francisco · Onsite · Jul 30
Own the electrical architecture of a medical scanner as in-house lead.
GDGoogle DeepMind · Mountain View, CA, USA · Onsite · Oct 5
Develop custom silicon powering Google's direct-to-consumer products.
GDGoogle DeepMind · Mountain View, CA, USA · Onsite · Sep 25
Match off-the-shelf hardware to AI model compute and latency needs.
GDGoogle DeepMind · Mountain View, CA, USA · Onsite · Sep 30
Develop custom silicon powering Google's direct-to-consumer products.
GDGoogle DeepMind · Cambridge, MA, USA · Onsite · Oct 1
Design control systems for long-horizon, fully autonomous robot behaviors.
GDGoogle DeepMind · Cambridge, MA, USA · Onsite · Sep 21
Build core hardware for advanced robots capable of dexterous physical actions.
GDGoogle DeepMind · Paris, France · Onsite · Sep 30
Automate design of ML hardware accelerators to boost engineer productivity.
GDGoogle DeepMind · Cambridge, MA, USA · Onsite · Oct 5
Build telemetry and diagnostic tools to catch hardware anomalies early.