Research Engineer, Chip Design RL
Anthropic · San Francisco, CA
Frontier labonsite$500k–$850k
At a glance
Highlights
- Advance Claude's ability to design silicon in unforgiving hardware domains.
- Build RL environments for RTL generation, verification, and physical design.
- Deliver research into production training runs for frontier Claude models.
What they offer
- Competitive compensation and benefits
- Equity donation matching
- Generous vacation and parental leave
- Flexible working hours
Ideal candidate
Chip designer who has taken silicon from spec to tapeout and wants to turn that craft into learning signals for AI. You balance research curiosity with engineering pragmatism and care about safe, beneficial AI.
Requirements
- Expertise in ASIC or FPGA design including RTL, verification, physical design and PPA optimization
- Fluent with industry EDA tools and processes
- Experience taping out chips from spec to silicon
- Ability to balance research exploration with engineering implementation
- Passionate about AI potential and committed to safe and beneficial systems
- Bachelor's degree or equivalent combination of education, training and/or experience
- remote policy
- Expect staff in office at least 25% of the time
Lab profile
About Anthropic
AI safety company building reliable, interpretable and steerable frontier AI systems.
What they build
- Claude
- Claude API
- Claude Code
Known for
- AI safety and alignment
- Model interpretability research
- Frontier LLM development
Key facts
- Founded in 2021
- Headquartered in San Francisco, California
- Backed by Amazon and Google
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