Research Engineer, Chip Design RL (Reinforcement Learning)

Highlights

• Advance Claude's ability to design silicon in unforgiving hardware domains.
• Invent RL environments for agentic RTL generation and verification.
• Optimize physical design flows and deliver research to production training.

What they offer

• Competitive compensation and benefits
• Optional equity donation matching
• Generous vacation and parental leave
• Flexible working hours

Ideal candidate

A hands-on chip designer who has taken silicon from spec to tapeout and loves turning hardware expertise into AI training signals. You balance research curiosity with engineering pragmatism and care deeply about safe, beneficial AI.

Requirements

• Expertise in ASIC or FPGA design including RTL, verification, physical design and PPA optimization
• Fluent with industry EDA tools and processes
• Experience taping out chips from spec to silicon
• Ability to balance research exploration with engineering implementation
• Bachelor's degree or equivalent combination of education and experience