Member of Technical Staff - Microarchitectural Validation

Highlights

• Own verification strategy for AI-generated designs taping out on leading foundries.
• Work at the intersection of hardware verification and AI-driven design automation.
• Help compress software-to-silicon timelines for next-gen AI workloads.

What they offer

• Competitive salary and meaningful equity stake
• Fast-paced startup with autonomy and visible impact
• Cutting-edge challenges at the intersection of AI and silicon design

Ideal candidate

A rigorous, autonomous verification veteran who loves startup ownership and leading DV as teams scale, excited by blending hardware correctness with AI-driven design automation.

Requirements

• Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering or related field
• 5+ years (10+ preferred) working on advanced-node tapeouts
• Deep expertise in verification/validation, emulation and architectural/system-level verification
• Proven track record defining microarchitectural checkers, monitors and reusable validation collateral
• Strong skills in SystemVerilog, UVM and C/C++; Python strongly preferred
• Hands-on verification experience in at least one: ARM/AMBA, CPU subsystems, memory controllers, NoC, NPU, security IPs
• Hands-on experience with simulation and emulation flows and FPGA prototyping
• Excellent problem-solving, collaboration and communication with independent execution
• Ability and desire to lead the DV function as the team scales