Vice President of ASIC Engineering

Highlights

• Own end-to-end delivery of ambitious AI compute silicon programs.
• Build AI-native chip flow to compress software-to-silicon timelines.
• Partner with frontier labs, clouds, and advanced fabs on custom chips.

What they offer

• Meaningful equity
• Ownership of critical silicon programs
• Chance to build a world-class ASIC organization

Ideal candidate

A proven silicon leader who has repeatedly taped out complex chips and thrives building elite teams and faster, AI-driven development flows.

Requirements

• Direct leadership of multiple complex, production-volume ASIC or SoC programs
• Deep expertise spanning RTL, verification, synthesis, timing closure, physical implementation, DFT, signoff and bring-up
• Track record transforming design flows through automation or AI-assisted EDA
• Demonstrated ability to deliver demanding programs with strong first-silicon outcomes
• Record of recruiting, developing and leading world-class silicon engineers
• Hands-on credibility to resolve difficult cross-functional engineering problems