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Physical Design Engineer

Cerebras · Sunnyvale, CA

CHECKED 9H AGO

Infrastructureonsitesenior$230k–$280k
Apply on the lab’s site ↗

At a glance

Highlights

  • Build the world's largest AI chip, 56x larger than GPUs.
  • Deliver 10x faster AI training and inference for real-time applications.
  • Synthesize, place and route high-speed blocks into full-chip architecture.

Ideal candidate

An ownership-driven hardware engineer who loves deep-diving complex designs and collaborating with RTL teams to push power, performance, and area for breakthrough AI hardware.

Requirements

  • 10+ years of physical design/verification experience
  • Strong knowledge of block-level and full-chip physical verification methodology
  • Strong background in block physical design, synthesis, PDV and IR
  • Expert at optimizing for power, performance and area
  • Experience with complete physical design flow
  • Knowledge of Synopsys tool suite
  • Expert with ICV or Calibre for block and full-chip DRC and LVS
  • Expert with IR/EM analysis and resolution
  • Strong scripting in Tcl and Python with flow enhancements
  • Proven collaboration with RTL teams to optimize for physical design
  • Ownership mindset with deep understanding of PD concepts
  • Experience with full-chip floorplanning and integration
  • Knowledge of clock distribution
  • Knowledge of cooling analysis
  • Knowledge of STA
  • Knowledge of 2.5D or 3D packaging solutions

Lab profile

About Cerebras

Builds wafer-scale AI chips and cloud systems for ultra-fast training and inference.

What they build

  • Wafer-scale AI chips
  • AI training systems
  • Cloud inference service

Known for

  • 56x larger chips than GPUs
  • 10x faster inference than GPU clouds
  • Industry-leading training speed
More about Cerebras →
Apply on the lab’s site ↗