Staff Analog Design Engineer, TX/RX Datapath

Highlights

• Own the SerDes TX/RX datapath linking inference accelerators beyond one package.
• Carry datapath blocks from specification through silicon characterization hands-on.
• Help build memory-centric architecture making AI inference faster and efficient.

What they offer

• Equity
• Bonus

Ideal candidate

A hands-on analog designer who loves owning blocks from spec to silicon and is energized by hard problems. Humble, collaborative executor driven to shape next-generation AI interconnect.

Requirements

• BS/MS/PhD in Electrical Engineering with 8+ years of hands-on analog and mixed-signal design experience
• Demonstrated ownership of a SerDes transmit or receive datapath block through to working silicon
• Deep knowledge of high-speed driver, receive front-end, and equalization design plus adjacent clocking and CDR
• Practical command of jitter and noise analysis, decomposition, budgeting, and simulation methodology
• Circuit design experience in advanced FinFET or GAA nodes with Cadence Virtuoso, Spectre, Monte Carlo and post-layout simulation
• Link and channel modeling experience with MATLAB, Python, and S-parameter models
• Silicon bring-up and bench debug experience with scopes and BERTs