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Design Verification Engineer - Interface IP

Etched · San Jose

CHECKED 8H AGO

Infrastructureonsitesenior$150k–$275k
Apply on the lab’s site ↗

At a glance

Highlights

  • Take end-to-end ownership of interface IP subsystems for AI inference hardware.
  • Validate correctness and performance across the full hardware-software stack.
  • Help deliver best-in-class throughput and latency for frontier AI workloads.

What they offer

  • Medical, dental, and vision packages with generous premium coverage
  • $500 per month credit for waiving medical benefits
  • Housing subsidy and relocation support for San Jose
  • Daily lunch and dinner plus wellness benefits

Ideal candidate

A deeply curious verification engineer who loves hunting corner-case bugs and owning complex problems end-to-end. You thrive in fast-paced startups and collaborate naturally across design, software, and vendors.

Requirements

  • 5+ years of design verification experience
  • Hands-on experience with SystemVerilog/UVM and scalable, reusable testbenches
  • Familiarity with standard IP interfaces and protocols such as PCIe, Ethernet, AXI/AMBA, or ARM/ARC CPUs
  • Ability to take ownership in a fast-paced startup environment with minimal direction
  • Strong collaboration across RTL design, software, and emulation teams
  • Experience handling vendors and integration of IP/VIPs (preferred)
remote policy
Fully in-person

Lab profile

About Etched

Building specialized AI chips and systems for frontier inference with best-in-class throughput and latency.

What they build

  • Sohu AI inference chip
  • AI racks and hardware systems
  • Inference software stack

Known for

  • Full-stack co-design of chips, racks, software and manufacturing
  • Best-in-class throughput and latency for prefill and decode
  • Inference-optimized architecture

Key facts

  • Backed by hundreds of millions from top-tier investors
More about Etched →
Apply on the lab’s site ↗