Design Verification Engineer - Internal IP
Etched · Austin
Infrastructureonsite$150k–$350k
At a glance
Highlights
- Verify custom IPs like systolic arrays, DMA engines, and NoCs for AI chips.
- Co-design chips, racks, and software for frontier AI inference workloads.
- Collaborate across HW-SW stack for end-to-end bring-up and debug coverage.
What they offer
- Medical, dental, and vision packages with generous premium coverage
- $500 per month credit for waiving medical benefits
- Wellness benefits covering fitness, mental health, and more
- Daily lunch + dinner in office
- Unlimited compute budget subject to ROI justification
- Significant equity
Ideal candidate
Creative, deeply technical problem-solver who thrives on complex verification challenges and cross-disciplinary collaboration across architecture, design, and software to deliver silicon-ready AI hardware.
Requirements
- Proficiency with UVM and SystemVerilog
- Strong debugging and problem-solving skills for complex digital designs
- Solid knowledge of computer architecture and digital design fundamentals
- Hands-on experience verifying datapaths, memory systems, interconnects, or high-throughput fabrics
- Familiarity with SystemVerilog Assertions (SVA) and formal verification techniques
- Experience verifying systolic arrays, DMA engines, or NoC/AXI protocols
- Scripting skills in Python/Perl/TCL or similar for automation and regression flows
Lab profile
About Etched
Building specialized AI chips and systems for frontier inference with best-in-class throughput and latency.
What they build
- Sohu AI inference chip
- AI racks and hardware systems
- Inference software stack
Known for
- Full-stack co-design of chips, racks, software and manufacturing
- Best-in-class throughput and latency for prefill and decode
- Inference-optimized architecture
Key facts
- Backed by hundreds of millions from top-tier investors
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