Design Verification Engineer - Internal IP
Etched · San Jose
CHECKED 8H AGO
Infrastructureonsite$150k–$275k
At a glance
Highlights
- Verify custom IPs powering AI chips including systolic arrays and NoCs.
- Help deliver best-in-class throughput and latency for inference workloads.
- Validate correctness and performance across full hardware-software stack.
What they offer
- Medical, dental, and vision packages with generous premium coverage
- $500 per month credit for waiving medical benefits
- Housing subsidy of $2.5k per month for those living within walking distance of the office
- Relocation support for those moving to San Jose (Santana Row)
- Various wellness benefits covering fitness, mental health, and more
- Daily lunch + dinner in our office
- Unlimited compute budget subject to ROI justification
Ideal candidate
Creative, deeply technical verification engineer who loves tackling complex datapath challenges and collaborating across architecture, design, and software to ship robust, silicon-ready AI hardware.
Requirements
- Proficiency with UVM and SystemVerilog
- Strong debugging and problem-solving skills for complex digital designs
- Solid knowledge of computer architecture and digital design fundamentals
- Hands-on experience verifying datapaths, memory systems, interconnects, or high-throughput fabrics
- remote policy
- Fully in-person
Lab profile
About Etched
Building specialized AI chips and systems for frontier inference with best-in-class throughput and latency.
What they build
- Sohu AI inference chip
- AI racks and hardware systems
- Inference software stack
Known for
- Full-stack co-design of chips, racks, software and manufacturing
- Best-in-class throughput and latency for prefill and decode
- Inference-optimized architecture
Key facts
- Backed by hundreds of millions from top-tier investors