Design Verification Engineer - SoC
Etched · Austin
CHECKED 9H AGO
Infrastructureonsite$150k–$275k
At a glance
Highlights
- Verify custom IPs powering frontier AI inference chips for performance.
- Correlate RTL behavior with performance models pre-silicon and post-silicon.
- Drive end-to-end performance tuning across the full hardware-software stack.
What they offer
- Medical, dental, and vision packages with generous premium coverage
- $500 per month credit for waiving medical benefits
- Wellness benefits covering fitness, mental health, and more
- Daily lunch + dinner in office
- Unlimited compute budget subject to ROI justification
Ideal candidate
A creative, deeply technical verification engineer who thrives on complex performance challenges and collaborates across architecture, design, and software to push AI hardware to its limits.
Requirements
- Strong understanding of digital design, RTL, and ASIC design flows
- Hands-on experience with performance verification, simulation, and modeling
- Comfortable developing checkers, coverage monitors, and testbenches in SystemVerilog
- Skilled in writing Python scripts for automation, data analysis, and performance modeling
- Experience building and maintaining performance models for chip subsystems
- Understanding of memory hierarchies, pipelines, interconnects, and compute accelerators
- Familiarity with performance bottleneck analysis, compiler optimizations, and workload tuning
- Some exposure to kernel level performance metrics and profiling tools
Lab profile
About Etched
Building specialized AI chips and systems for frontier inference with best-in-class throughput and latency.
What they build
- Sohu AI inference chip
- AI racks and hardware systems
- Inference software stack
Known for
- Full-stack co-design of chips, racks, software and manufacturing
- Best-in-class throughput and latency for prefill and decode
- Inference-optimized architecture
Key facts
- Backed by hundreds of millions from top-tier investors