Design Verification Engineer - SoC
Etched · San Jose
CHECKED 6H AGO
Infrastructureonsite$150k–$275k
At a glance
Highlights
- Verify custom IPs like systolic arrays, DMA engines and NoCs for silicon readiness.
- Correlate RTL performance with architectural models pre- and post-silicon.
- Tune full hardware-software stack to maximize throughput and latency.
What they offer
- Medical, dental, and vision packages with generous premium coverage
- $500 per month credit for waiving medical benefits
- Housing subsidy of $2.5k per month for those living within walking distance
- Relocation support for moving to San Jose (Santana Row)
- Wellness benefits covering fitness, mental health, and more
- Daily lunch + dinner in office
- Unlimited compute budget subject to ROI justification
Ideal candidate
Creative, deeply technical verification engineer who loves tackling complex performance challenges and collaborating across architecture, design and software to optimize AI inference hardware.
Requirements
- Strong understanding of digital design, RTL, and ASIC design flows
- Hands-on experience with performance verification, simulation, and modeling
- Comfortable developing checkers, coverage monitors, and testbenches in SystemVerilog
- Skilled in writing Python scripts for automation, data analysis, and performance modeling
- Experience building and maintaining performance models for chip subsystems
- Understanding of memory hierarchies, pipelines, interconnects, and compute accelerators
- Familiarity with performance bottleneck analysis, compiler optimizations, and workload tuning
- Some exposure to kernel level performance metrics and profiling tools
- remote policy
- Fully in-person
Lab profile
About Etched
Building specialized AI chips and systems for frontier inference with best-in-class throughput and latency.
What they build
- Sohu AI inference chip
- AI racks and hardware systems
- Inference software stack
Known for
- Full-stack co-design of chips, racks, software and manufacturing
- Best-in-class throughput and latency for prefill and decode
- Inference-optimized architecture
Key facts
- Backed by hundreds of millions from top-tier investors