DFT (Design For Test) Engineer

Highlights

• Build hardware for frontier intelligence delivering best-in-class throughput.
• Co-design chips, racks, software and manufacturing for AI inference workloads.
• Drive test strategy from design through silicon bring-up to volume production.

What they offer

• Medical, dental, and vision packages with generous premium coverage
• $500 per month credit for waiving medical benefits
• $2.5k per month housing subsidy for those living within walking distance
• Relocation support for those moving to San Jose (Santana Row)
• Wellness benefits covering fitness, mental health, and more
• Daily lunch and dinner in office
• Unlimited compute budget subject to ROI justification
• Significant equity

Ideal candidate

Seasoned DFT engineer with 10+ years taking ASICs to production who thrives collaborating across design and test and cares deeply about product quality and reliability.

Requirements

• 10+ years of experience in DFT engineering with successful ASIC or SoC test implementations
• Deep understanding of digital design, verification methodologies, and DFT implementation practices
• Proficiency in SystemVerilog and industry-standard EDA tools
• Scripting and automation experience using Python, Perl, or TCL
• Track record leading DFT initiatives across multiple product generations
• Strong analytical and debugging skills for complex testability issues
• Excellent communication and collaboration abilities
• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field (Master's preferred)