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Emulation Engineer, Hardware Prototyping (HAPS)

Etched · San Jose

Infrastructureonsite$150k–$350k
Apply on the lab’s site ↗

At a glance

Highlights

  • Own full-chip prototype bring-up from RTL to firmware boot end to end.
  • Build self-service flows that let software users run images without support.
  • Instrument deep trace across partitions and surface debug insights usefully.

What they offer

  • Medical, dental, and vision packages with generous premium coverage
  • $500 per month credit for waiving medical benefits
  • Housing subsidy of $2,500 per month for those living within walking distance of the office
  • Relocation support for those moving to San Jose (Santana Row)
  • Various wellness benefits covering fitness, mental health, and more
  • Daily lunch and dinner in our office
  • Unlimited compute budget subject to ROI justification

Ideal candidate

A hands-on prototyper who loves bring-up, unblocking firmware and software teams, and chasing ambiguous failures across boundaries.

Requirements

  • Hands-on FPGA prototyping experience — HAPS, Protium, proFPGA, S2C, or similar — covering partitioning, synthesis, timing closure, bring-up, and debug
  • Strong SystemVerilog and Verilog, with working understanding of what synthesizes well for FPGA
  • Solid C/C++ and Linux system development
  • Scripting fluency for automation — Python, TCL, shell
  • Comfort debugging failures you didn't cause, in code you didn't write, for users who need an answer today
  • Experience with ProtoCompiler, Vivado, or Synopsys prototyping flows
  • Firmware, driver, or bootloader bring-up experience on pre-silicon platforms
  • Experience with emulation platforms (ZeBu, Palladium, Veloce) alongside prototyping
  • UVM verification environments, DFT, and testbench modeling
  • Waveform debug tooling: Verdi, SimVision
  • Cluster and job scheduling experience (SLURM), CI systems
remote policy
fully in-person

Lab profile

About Etched

Building specialized AI chips and systems for frontier inference with best-in-class throughput and latency.

What they build

  • Sohu AI inference chip
  • AI racks and hardware systems
  • Inference software stack

Known for

  • Full-stack co-design of chips, racks, software and manufacturing
  • Best-in-class throughput and latency for prefill and decode
  • Inference-optimized architecture

Key facts

  • Backed by hundreds of millions from top-tier investors
More about Etched →
Apply on the lab’s site ↗

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