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Physical Design Engineer

Etched · Austin

Infrastructureonsitesenior$200k–$375k
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At a glance

Highlights

  • Co-design chips, racks, software and manufacturing for frontier intelligence.
  • Own block-level implementation driving timing closure and PPA optimization.
  • Deliver best-in-class throughput and latency for inference workloads.

What they offer

  • Medical, dental and vision packages with generous premium coverage
  • $500 per month credit for waiving medical benefits
  • Wellness benefits covering fitness, mental health and more
  • Daily lunch + dinner in office

Ideal candidate

Creative first-principles thinker with deep physical design experience who thrives in fast-paced startups and cares about PPA optimization, iteration speed, and building inference hardware.

Requirements

  • 5-10+ years experience with PD tools, flow and methodology from RTL synthesis to GDSII sign-off
  • Experience with back-end design and timing closure on advanced nodes (5nm and below)
  • Experience with Cadence (Innovus, Genus) or Synopsys (ICC2, Fusion Compiler) RTL-to-GDSII flows
  • Experience with sign-off tools such as PrimeTime, Tempus and Voltus
  • Experience with UPF low-power methodology, synthesis, scan/ATPG, formal verification, floorplanning, placement, CTS, routing, IR drop and EM/antenna analysis
  • Ability to program with Python or another scripting language

Lab profile

About Etched

Building specialized AI chips and systems for frontier inference with best-in-class throughput and latency.

What they build

  • Sohu AI inference chip
  • AI racks and hardware systems
  • Inference software stack

Known for

  • Full-stack co-design of chips, racks, software and manufacturing
  • Best-in-class throughput and latency for prefill and decode
  • Inference-optimized architecture

Key facts

  • Backed by hundreds of millions from top-tier investors
More about Etched →
Apply on the lab’s site ↗

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