Physical Design Engineer - Flow & Methodologies

Highlights

• Architect Etched's RTL-to-GDSII flow from first principles for frontier inference.
• Build hardware co-designing chips, racks, and software for AI inference.
• Drive PPA gains and accelerate time-to-market with novel CAD methodologies.

What they offer

• Medical, dental, and vision packages with generous premium coverage
• $500 per month credit for waiving medical benefits
• Housing subsidy of $2.5k per month for those living within walking distance of the office
• Relocation support for those moving to San Jose (Santana Row)
• Various wellness benefits covering fitness, mental health, and more
• Daily lunch and dinner in our office
• Unlimited compute budget subject to ROI justification

Ideal candidate

A creative, first-principles physical design engineer with 5-10+ years experience who loves building high-velocity automation and accelerating frontier AI hardware in a fast-paced, in-person team.

Requirements

• 5-10+ years of previous experience with PD or PD methodology/CAD
• Experience building and owning automated RTL-to-GDSII flows used by multiple block owners
• Experience creating block level and full chip level PG mesh from scratch, including interpretation of design rule documents and EM/IR analysis
• Experience with DRC-clean floorplanning flows and automated checks
• Experience with Cadence (Innovus, Genus) or Synopsys (Fusion Compiler) automated RTL-to-GDSII flows
• Experience with PPA tuning and timing correlation across pre-route, post-route, and signoff environments
• Experience integrating sign-off tools (PrimeTime, Tempus, Voltus, Pegasus, Calibre) into production flows
• Experience with back-end design on advanced process nodes (5nm and below)
• Experience with UPF-based low power design methodology and multi-mode multi-corner setup
• Strong Tcl and Python skills for flow development and automation
• Deeply creative and able to think from first principles