Power Validation Engineer

Highlights

• Own end-to-end power characterization of ASIC and mezzanine card to production.
• Drive silicon, package and system decisions from power and thermal findings.
• Run 72h+ stress workloads to surface reliability risks and throttling behavior.

What they offer

• Medical, dental, and vision packages with generous premium coverage
• $500 per month credit for waiving medical benefits
• $2,500 per month housing subsidy for living within walking distance of office
• Relocation support for moving to San Jose (Santana Row)
• Wellness benefits covering fitness, mental health, and more
• Daily lunch and dinner in office
• Unlimited compute budget subject to ROI justification

Ideal candidate

Hands-on power validation engineer who loves the lab and thrives debugging complex hardware-software interactions. You care about measurement rigor and turning data into clear design decisions for cutting-edge AI hardware.

Requirements

• Bachelor's degree in Electrical Engineering or related field
• Deep understanding of ASIC and system-level power delivery including VRM topology, PDN impedance, decoupling strategy and transient response
• Hands-on bench experience with precision shunts, isolated differential probes, and VNA-based PDN impedance measurement
• Expertise with multi-phase power solutions with high dynamic content and low tolerance, including VR tuning
• Strong oscilloscope and lab instrument fluency for triggering on rare transient events and correlating multi-channel captures
• Track record of finding bugs that only surface under specific workload or environmental conditions in complex hardware-software stack
• Relevant experience with silicon bring-up