Substrate IC Package Layout Design Engineer

Highlights

• Design large >50mm IC substrates for high-power AI processors.
• Co-design chips, racks and software for frontier inference hardware.
• Optimize power delivery for >700W custom silicon solutions.

What they offer

• Medical, dental, and vision packages with generous premium coverage
• $500 per month credit for waiving medical benefits
• Housing subsidy of $2.5k per month for those living within walking distance
• Relocation support for those moving to San Jose
• Wellness benefits covering fitness, mental health, and more
• Daily lunch and dinner in office
• Unlimited compute budget subject to ROI justification

Ideal candidate

Veteran package designer who thrives on pushing power and signal limits for frontier AI hardware. Collaborative, analytical builder excited to co-design with silicon and systems teams in-person.

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
• 10+ years of experience in IC substrate layout design for high-performance processors or accelerators
• Extensive experience with large substrate packages (>50mm) and complex high-density layouts
• Proven experience with high-power (700W+) package designs and robust power delivery networks
• Expertise in high-speed signaling design (>50GHz) and mitigating signal integrity challenges
• Strong experience with CoWoS interposer design
• Advanced proficiency in Allegro Package Designer
• Deep understanding of SI/PI principles for package-level design
• Strong analytical skills and ability to work in fast-paced, cross-functional team