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Substrate IC Package Layout Design Engineer

Etched · San Jose

CHECKED 9H AGO

Infrastructureonsitesenior
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At a glance

Highlights

  • Design complex IC substrates for high-power AI processors and accelerators.
  • Co-design chips, racks, and software for best-in-class AI inference.
  • Optimize power delivery and high-speed signaling for frontier models.

What they offer

  • Medical, dental, and vision packages with generous premium coverage
  • Housing subsidy for those living within walking distance of office
  • Relocation support for moves to San Jose
  • Wellness benefits covering fitness and mental health
  • Daily lunch and dinner in office

Ideal candidate

A seasoned hardware builder who thrives in fast-paced, in-person collaboration and cares about pushing limits for frontier AI inference.

Requirements

  • Bachelor's or Master's in Electrical Engineering, Computer Engineering or related field
  • 10+ years experience in IC substrate layout design for high-performance processors
  • Experience with large >50mm high-density substrate packages
  • Experience with 700W+ package designs and power delivery networks
  • Expertise in >50GHz signaling and signal integrity mitigation
  • Experience with CoWoS interposer design
  • Proficiency in Allegro Package Designer
  • Understanding of SI/PI principles at package level

Lab profile

About Etched

Building specialized AI chips and systems for frontier inference with best-in-class throughput and latency.

What they build

  • Sohu AI inference chip
  • AI racks and hardware systems
  • Inference software stack

Known for

  • Full-stack co-design of chips, racks, software and manufacturing
  • Best-in-class throughput and latency for prefill and decode
  • Inference-optimized architecture

Key facts

  • Backed by hundreds of millions from top-tier investors
More about Etched →
Apply on the lab’s site ↗