Hardware - Silicon Validation Engineer (NPU SoC)
FuriosaAI · Seoul, South Korea
Infrastructureonsite
At a glance
Highlights
- Lead 1st silicon bring-up of NPU SoC from initial boot to commercialization.
- Validate NPU data pipelines and memory bandwidth for performance optimization.
- Ship real-world AI-native compute running live enterprise workloads globally.
Ideal candidate
A persistent system-level problem solver who bridges hardware and software and thrives owning first silicon bring-up from boot to stable, commercial deployment.
Requirements
- Experience with SoC, ASIC, or complex silicon/system validation
- Strong understanding of ARM architecture, AMBA bus and SoC architecture
- Embedded C/C++ and Rust programming for bare-metal hardware control
- Experience with test plans, bug tracking and coverage-driven validation
- Proficiency with JTAG debuggers and HW/SW co-debugging
Lab profile
About FuriosaAI
Builds high-performance, high-efficiency AI compute for the Inference Era.
What they build
- AI inference accelerators
- High-efficiency AI compute hardware
Known for
- Energy-efficient AI chip architecture
- High-performance AI inference
- AI compiler development
Key facts
- Founded in 2017
- Offices in Korea and Silicon Valley
- Compiler-focused R&D lab in Lisbon
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