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Hardware - Silicon Validation Team Lead (NPU SoC)

FuriosaAI · Seoul, South Korea

Infrastructureonsitelead
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At a glance

Highlights

  • Lead 1st silicon bring-up for NPU SoC from boot to commercialization.
  • Bridge hardware and software to debug complex system-level issues.
  • Shape next-gen AI compute with RNGD in mass production today.

Ideal candidate

A persistent system-level problem solver who thrives bridging hardware and software, leading bring-up from first boot to stable product while mentoring engineers and driving rigorous validation methodology.

Requirements

  • SoC/ASIC or complex silicon/system validation experience with team leading or equivalent senior experience
  • Strong understanding of ARM architecture, AMBA bus (AXI, AHB) and SoC/computer architecture
  • Embedded C/C++ and Rust for hardware control and IP test in bare-metal environments
  • Systematic validation methodology from test plan and coverage to bug tracking
  • HW/SW co-debugging with JTAG debuggers such as Trace32
  • Lead validation roadmap planning and cross-functional collaboration across Design, DV, Firmware, Software and QA
  • Mentor engineers and establish systematic validation processes

Lab profile

About FuriosaAI

Builds high-performance, high-efficiency AI compute for the Inference Era.

What they build

  • AI inference accelerators
  • High-efficiency AI compute hardware

Known for

  • Energy-efficient AI chip architecture
  • High-performance AI inference
  • AI compiler development

Key facts

  • Founded in 2017
  • Offices in Korea and Silicon Valley
  • Compiler-focused R&D lab in Lisbon
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