Sr. Physical Design Flow & Methodology Engineer

Highlights

• Build flows and automation to tape out high-performance ASICs.
• Tackle design problems that are new to the photonics industry.
• Help enable AI data centers with 3D-stacked photonics engines.

What they offer

• Comprehensive Health Care Plan (Medical, Dental & Vision)
• Retirement Savings Matching Program
• Life Insurance (Basic, Voluntary & AD&D)
• Generous Time Off (Vacation, Sick & Public Holidays)
• Paid Family Leave
• Short Term & Long Term Disability
• Training & Development
• Commuter Benefits
• Equity grants (full-time employees)

Ideal candidate

A builder who loves writing code that makes other engineers more productive. You thrive in fast-paced, research-driven environments and want to shape how next-generation photonic chips get built.

Requirements

• Bachelor's in Electrical Engineering, Computer Engineering or Computer Science plus 5+ years related experience
• Contributed to at least one ASIC or mixed-signal chip through tapeout
• Solid understanding of RTL-to-GDS flow including synthesis, P&R, CTS, STA and physical verification
• Strong Python skills with working knowledge of TCL and shell scripting
• Experience or strong interest in using AI coding assistants or LLM tools to automate engineering work
• Able to collaborate across PD, RTL, verification, CAD and photonics teams in ambiguous, fast-paced environment