Sr. Staff Physical Design Timing Engineer (STA)

Highlights

• Drive STA sign-off for flagship silicon photonics chips at various nodes.
• Help power Passage engine linking thousands to millions of processors with light.
• Shape backend execution for leading photonics-based interconnect solutions.

What they offer

• Comprehensive Health Care Plan (Medical, Dental & Vision)
• Retirement Savings Matching Program
• Life Insurance (Basic, Voluntary & AD&D)
• Generous Time Off (Vacation, Sick & Public Holidays)
• Paid Family Leave
• Short Term & Long Term Disability
• Training & Development
• Commuter Benefits
• Flexible, hybrid workplace model
• New hire equity grant and annual performance-based equity

Ideal candidate

A seasoned physical design engineer who thrives on complex timing challenges and innovation. You are detail-oriented, collaborative, and passionate about building breakthrough photonics systems for AI infrastructure.

Requirements

• Bachelor's degree in Electrical Engineering or Computer Engineering
• 12 years of Physical Design experience with 5+ years in ASIC STA and timing closure
• Experience driving timing closure managing OCV derates and multi-mode multi-corner constraints
• Skilled in scripting with TCL, Python, Perl, or Shell
• Strong problem-solving skills with attention to technical detail
• Strong team player with clear and precise communication skills