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ASIC/SOC CAD Engineer

MatX · Mountain View (HQ) or Remote

CHECKED 9H AGO

Infrastructureremotesenior$160k–$600k
Apply on the lab’s site ↗

At a glance

Highlights

  • Build best-in-class silicon to make top AI models run efficiently.
  • Own RTL-to-GDSII physical design flow across compute and connectivity.
  • Drive performance-power-area results in leading-edge process nodes.

What they offer

  • 4 weeks PTO + 12 company holidays
  • Company-subsidized medical, dental and vision insurance
  • 401(k) with up to 5% company contribution
  • $1500 annual professional development budget
  • Daily onsite meals and 100% paid commute
  • Up to 12 weeks paid parental leave

Ideal candidate

Seasoned physical design engineer who loves building efficient CAD flows and optimizing silicon. Collaborative problem-solver who enjoys supporting users and driving tools to closure.

Requirements

  • Bachelor's in Electrical Engineering or equivalent
  • Minimum 8 years industry experience in ASIC Physical Design
  • Strong proficiency in Perl, Python and TCL
  • Expertise in ASIC construction and sign-off methodologies
  • Great interpersonal and communication skills
remote policy
3 days onsite Tue-Thu, up to 3 weeks remote work

Lab profile

About MatX

Designs vertically integrated AI silicon and systems to run frontier models at physics-limit efficiency.

What they build

  • AI accelerator silicon for GenAI training and inference
  • Rack-scale AI data center systems
  • Full-stack silicon-to-software platform for large ML workloads

Known for

  • Vertically integrated silicon-to-systems design
  • AI accelerator architecture and performance modeling for LLMs
  • High-efficiency power architecture from chip to rack
  • Silicon verification and software-hardware co-verification
More about MatX →
Apply on the lab’s site ↗