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Emulation Engineer

MatX · Mountain View (HQ) or Remote

CHECKED 9H AGO

Infrastructureremotesenior
Apply on the lab’s site ↗

At a glance

Highlights

  • Build vertically integrated silicon-to-systems to power largest AGI workloads.
  • Create reusable flows spanning emulation to post-silicon validation.
  • Build practical LLM tooling for log analysis and debug assistance.

What they offer

  • Commute on Us: 100% paid daily commute via company Uber or train reimbursement
  • MatX E[x]tras: $50/mo perk allowance
  • Cell and Internet reimbursement: $35/mo cellular and $40/mo wifi
  • Remote home setup: up to $1000 in office setup purchases
  • 100% paid mental health benefit via SpringHealth and Guardian EAP
  • Up to 12 weeks paid parental leave plus flexible return-to-work

Ideal candidate

A resourceful, reuse-first builder who loves bridging hardware and software and filling gaps without being asked. You learn fast across domains and care about scalable flows and system-level problem solving.

Requirements

  • Strong hands-on experience with SoC emulation or system-level validation
  • Experience with at least one commercial emulation platform such as Palladium
  • Working Verilog/SystemVerilog and waveform-debug skills
  • Strong software and automation skills with Python plus C, C++, Rust, Tcl or shell
  • Demonstrated ability to build tools and infrastructure, not just run existing flows
  • Strong system-level debug instincts spanning RTL, firmware and software
  • Ability to work independently and across functional and team boundaries

Lab profile

About MatX

Designs vertically integrated AI silicon and systems to run frontier models at physics-limit efficiency.

What they build

  • AI accelerator silicon for GenAI training and inference
  • Rack-scale AI data center systems
  • Full-stack silicon-to-software platform for large ML workloads

Known for

  • Vertically integrated silicon-to-systems design
  • AI accelerator architecture and performance modeling for LLMs
  • High-efficiency power architecture from chip to rack
  • Silicon verification and software-hardware co-verification
More about MatX →
Apply on the lab’s site ↗