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Mechanical Engineer - AI Rack Scale Systems

MatX · Mountain View (HQ) or Remote

CHECKED 9H AGO

Infrastructureremotemid-senior$160k–$600k
Apply on the lab’s site ↗

At a glance

Highlights

  • Design AI compute trays and rack enclosures for LLM training platform.
  • Build fully liquid-cooled infrastructure with cold plates and manifolds.
  • Lead hands-on EVT to PVT prototype builds, bring-up and debug.

What they offer

  • 4 weeks PTO plus 12 company holidays
  • Company-subsidized medical, dental and vision for employees and dependents
  • 401(k) with up to 5% company contribution and company-paid life insurance
  • $1500 annual professional development budget
  • Onsite lunch and dinner Monday-Friday and 100% paid daily commute
  • Up to 12 weeks paid parental leave and flexible return-to-work
  • Mental health benefit via SpringHealth and EAP

Ideal candidate

Hands-on mechanical engineer with data center hardware background who loves taking complex rack systems from concept through prototype debug and thrives collaborating with manufacturing partners.

Requirements

  • 5+ years of mechanical engineering experience in server, data center, or AI compute hardware
  • Experience designing rack-scale hardware — compute trays, rack enclosures, or server platforms
  • Familiarity with OCP Open Rack standards
  • Experience with liquid cooling systems — cold plates, manifolds, or CDU interfaces
  • Proficiency in 3D CAD (SolidWorks or equivalent) and GD&T
  • Familiarity with sheet metal, extrusion, casting, and machining processes
remote policy
Up to 3 weeks remote work

Lab profile

About MatX

Designs vertically integrated AI silicon and systems to run frontier models at physics-limit efficiency.

What they build

  • AI accelerator silicon for GenAI training and inference
  • Rack-scale AI data center systems
  • Full-stack silicon-to-software platform for large ML workloads

Known for

  • Vertically integrated silicon-to-systems design
  • AI accelerator architecture and performance modeling for LLMs
  • High-efficiency power architecture from chip to rack
  • Silicon verification and software-hardware co-verification
More about MatX →
Apply on the lab’s site ↗