Micro-Architect and RTL Designer
MatX · Mountain View (HQ) or Remote
CHECKED 9H AGO
Infrastructureremote$160k–$600k
At a glance
Highlights
- Build vertically integrated silicon-to-systems to power AGI workloads.
- Own subsystems from micro-architecture through sign-off-ready design.
- Create best-in-class silicon for high-performance, sustainable GenAI.
What they offer
- 4 weeks accrued PTO plus 12 company holidays
- Company-subsidized medical, dental, vision and life insurance plus HSA/FSA
- 401k with up to 5% company contribution
- $1500 yearly professional development budget
- Onsite lunch and dinner Monday-Friday and paid commute
- Up to 12 weeks paid parental leave plus pregnancy disability leave
Ideal candidate
A builder who loves taking complex silicon from concept to production and sweats performance-power-area tradeoffs. You thrive owning subsystems end-to-end and collaborating closely with verification and physical design.
Requirements
- Concept-to-silicon experience driving subsystem or top-level ASIC/SoC design to production
- 4+ years experience with SystemVerilog, Python, C/C++ for chip design and flows
- Production-proven micro-architecture for high-performance compute, connectivity or memory
- Experience testing designs with verification teams toward performance and coverage closure
- Hands-on experience with design synthesis, lint and sign-off quality flows
- remote policy
- Hybrid, in-office Tuesday through Thursday
Lab profile
About MatX
Designs vertically integrated AI silicon and systems to run frontier models at physics-limit efficiency.
What they build
- AI accelerator silicon for GenAI training and inference
- Rack-scale AI data center systems
- Full-stack silicon-to-software platform for large ML workloads
Known for
- Vertically integrated silicon-to-systems design
- AI accelerator architecture and performance modeling for LLMs
- High-efficiency power architecture from chip to rack
- Silicon verification and software-hardware co-verification