Office Coordinator
MatX · Mountain View
Infrastructureremote$160k–$170k
At a glance
Highlights
- Keep the MatX office running smoothly and welcoming for the AI hardware team.
- Own the kitchen, snacks and breakfast setup shaping daily office life.
- Organize happy hours, team-building events and holiday celebrations.
What they offer
- 4 weeks PTO plus 12 company holidays and up to 3 weeks remote work
- Subsidized medical, dental and vision insurance plus HSA, FSA and life insurance
- 401(k) with 5% company contribution plus life, disability and travel insurance
- $1,500 yearly professional development budget
- Onsite lunch and dinner Monday-Friday and fully paid daily commute
- $50/mo extras, cell and internet reimbursement and $1,000 home setup
- 100% paid mental health benefit via SpringHealth and EAP
- Up to 12 weeks paid parental leave plus $6K Family Fund
Ideal candidate
Organized and proactive helper with a hospitality mindset who enjoys juggling varied tasks and creating a welcoming office where people love to work.
Requirements
- 2+ years in office administration, coordination, hospitality or related role
- Strong organizational skills and attention to detail
- Clear written and verbal communication with friendly, professional manner
- Ability to manage multiple tasks and follow through with vendors and teams
- Comfort with invoices, expense records and basic spreadsheets
- Able to lift and carry up to 25 pounds with or without accommodation
- Experience in a startup or fast-growing tech company
- Experience planning company events
- Familiarity with onboarding and offboarding with IT and People teams
- remote policy
- Up to 3 weeks remote work
Lab profile
About MatX
Designs vertically integrated AI silicon and systems to run frontier models at physics-limit efficiency.
What they build
- AI accelerator silicon for GenAI training and inference
- Rack-scale AI data center systems
- Full-stack silicon-to-software platform for large ML workloads
Known for
- Vertically integrated silicon-to-systems design
- AI accelerator architecture and performance modeling for LLMs
- High-efficiency power architecture from chip to rack
- Silicon verification and software-hardware co-verification
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