Senior SoC Power Analysis & Optimization Engineer
MatX · Mountain View (HQ) or Remote
CHECKED 7H AGO
Infrastructureremotesenior$250k–$600k
At a glance
Highlights
- Develop power estimation methodologies for AI accelerator SoCs for AGI compute.
- Build and calibrate energy models for early architecture exploration.
- Drive power optimization across compute, memory, interconnect and HBM subsystems.
What they offer
- 4 weeks PTO + 12 company holidays
- Company-subsidized medical, dental and vision insurance
- 401K with up to 5% company contribution
- Up to 12 weeks paid parental leave
- 100% paid daily commute
Ideal candidate
Experienced SoC power engineer who loves digging into workloads and models to drive efficiency, collaborating across architecture and design teams in a fast-paced AGI hardware mission.
Requirements
- BS or MS in Electrical Engineering, Computer Engineering, or related field
- 8+ years of industry experience in SoC, AI accelerator, GPU, networking ASIC, or high-performance digital design
- Strong understanding of computer architecture and SoC design
- Experience with ASIC low-power design techniques
- Experience performing RTL and gate-level power analysis
- Strong analytical and debugging skills
- Experience with Python, Perl, or similar scripting languages
- Ability to work independently in a fast-paced environment
- Excellent communication and cross-functional collaboration skills
- remote policy
- Up to 3 weeks remote work
Lab profile
About MatX
Designs vertically integrated AI silicon and systems to run frontier models at physics-limit efficiency.
What they build
- AI accelerator silicon for GenAI training and inference
- Rack-scale AI data center systems
- Full-stack silicon-to-software platform for large ML workloads
Known for
- Vertically integrated silicon-to-systems design
- AI accelerator architecture and performance modeling for LLMs
- High-efficiency power architecture from chip to rack
- Silicon verification and software-hardware co-verification