Technical Program Manager, Silicon/Hardware
MatX · Mountain View (HQ) or Remote
CHECKED 9H AGO
Infrastructureremotesenior
At a glance
Highlights
- Build vertically integrated silicon-to-systems platform for AGI compute.
- Own Silicon HW programs from early planning through tapeout readiness.
- Deliver best-in-class silicon for high-performance sustainable GenAI.
What they offer
- Free lunch on Fridays via WeBox, Specialty's or reimbursement
- 100% paid daily commute via company Uber or train reimbursement
- $50/mo MatX Extras perk allowance
- $35/mo cell and $40/mo wifi reimbursement plus $1000 home office setup
- 100% paid mental health benefits via SpringHealth and Guardian EAP
- Up to 12 weeks paid parental leave plus 10 weeks pregnancy disability leave
Ideal candidate
Veteran silicon program leader who thrives at the intersection of engineering and execution, driving complex chip programs to tapeout with clarity and calm. You care about operational rigor, cross-functional alignment, and shipping high-impact AI hardware.
Requirements
- 15+ years of experience in chip/IC development as an engineer, engineering manager, or technical program manager, with at least 3 years in a technical program manager role
- Experience leading Silicon HW programs through multiple phases of the silicon lifecycle, with end-to-end chip execution from concept to silicon
- Experience driving complex cross-functional programs with multiple engineering teams, technical dependencies, external vendors, and tight schedules
- Technical fluency in SoC or chiplet design flows enough to understand RTL milestones, DV signoff, handoffs, and silicon bring-up phases
- Strong technical judgment managing tradeoffs across performance, power, area, cost, schedule, quality, and risk
- Ability to drive schedules, dependency management, issue tracking, risk management, milestone governance, and executive-level communication
- Experience coordinating design reviews and driving closure across cross-functional engineering teams
- Strong written and verbal communication skills including summarizing technical risks, tradeoffs, decisions, and schedule impact
- Proficiency with Jira, GitHub, Confluence, Smartsheet, MS Project, Google Workspace, or equivalent
Lab profile
About MatX
Designs vertically integrated AI silicon and systems to run frontier models at physics-limit efficiency.
What they build
- AI accelerator silicon for GenAI training and inference
- Rack-scale AI data center systems
- Full-stack silicon-to-software platform for large ML workloads
Known for
- Vertically integrated silicon-to-systems design
- AI accelerator architecture and performance modeling for LLMs
- High-efficiency power architecture from chip to rack
- Silicon verification and software-hardware co-verification