Hardware / Software CoDesign Engineer - 3P

Highlights

• Co-design next-gen AI silicon tightly integrated with advanced AI models.
• Build system performance models to guide scale-up and networking decisions.
• Influence vendor roadmaps for datacenter racks, networks and buildings.

What they offer

• Equity
• Relocation assistance

Ideal candidate

Systems-minded collaborator excited by large-model distribution and hardware-software tradeoffs, eager to partner across ML, kernels and vendors to shape efficient AI accelerators.

Requirements

• 4+ years of industry experience harnessing compute at scale and optimizing ML platform code for target hardware
• Strong experience in software/hardware co-design
• Deep understanding of GPU and/or other AI accelerators
• Experience with CUDA, Triton or related accelerator programming language
• Experience driving ML accuracy with low precision formats
• Experience with system performance modeling and analysis for ML deployment
• Strong coding skills in C/C++ and Python
• Familiar with fundamentals of deep learning computing and chip architecture/microarchitecture
• Ability to collaborate with ML, kernel, compiler, systems and chip architecture teams