Physical Design Engineer

Highlights

• Deliver PPA-optimized datapath and interconnect for next-gen AI accelerators.
• Own block implementation from floorplanning through final signoff.
• Help power frontier models with AI-native silicon and systems.

What they offer

• Equity

Ideal candidate

A hands-on physical design engineer energized by PPA optimization and methodology building who thrives partnering with RTL designers to ship complex AI accelerator silicon.

Requirements

• BS with 4+ years or MS with 2+ years or PhD with 0-1 years of relevant industry experience in physical design and methodology development
• Demonstrated success in taping out complex silicon designs
• Hands-on experience with block physical implementation and PPA convergence
• Strong coding experience with Python, Bazel, and TCL
• Strong experience building physical design tools, flows, and methodologies
• Strong understanding of microarchitecture, RTL design, physical design, circuit design, physical verification, and timing closure
• Deep familiarity with industry-standard tools and flows for physical synthesis, PNR, LEC, and power estimation