Senior Hardware Design Engineer

Highlights

• Design core units of the RDU chip powering rack-scale AI inference systems.
• Own blocks from microarchitecture through tapeout to bring-up in silicon.
• Build compute, memory and networking subsystems for dataflow AI workloads.

What they offer

• Equity as part of total rewards package
• 95% employee and 77% dependent medical coverage plus HSA with employer contribution
• Dental, Vision, Disability, Life and AD&D insurance plus FSA options
• Headspace subscription, Gympass+ membership, One Medical membership and EAP

Ideal candidate

A hands-on ASIC designer who loves owning blocks end-to-end, from spec to silicon. You thrive collaborating with architects and physical design while sweating PPA tradeoffs for high-performance AI hardware.

Requirements

• Master's in Computer/Electrical Engineering with 3-5 years experience or Bachelor's with 5-7 years
• Solid foundation in computer architecture and digital logic design
• Strong SystemVerilog RTL design skills for high-speed, high-performance ASICs
• Experience trading off Power, Performance, and Area (PPA)
• Working knowledge of AXI, PCIe, Ethernet, HBM/DDR interconnects and protocols
• Experience with digital logic synthesis tools and Static Timing Analysis (STA)
• Ability to work onsite in San Jose, CA or Austin, TX