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← Tenstorrent

Engineering Program Manager, RISCV

Tenstorrent · Austin, Texas, United States · Santa Clara

CHECKED 21H AGO

Infrastructureonsite$100k–$500k
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At a glance

Highlights

  • Drive high-performance RISC-V CPU program from spec through tapeout and debug.
  • Own schedules and cross-functional execution across architecture to silicon.
  • Learn how RISC-V CPU IP is delivered at scale for external customers.

What they offer

  • Highly competitive compensation package and benefits

Ideal candidate

Organized, proactive communicator with silicon development background who thrives aligning cross-functional teams and driving complex programs to closure. Excited by cutting-edge AI CPUs and solving hard execution challenges.

Requirements

  • Experience in CPU, SoC, or silicon development as an engineer, technical lead, or program manager
  • Hands-on experience with at least one silicon program through tapeout, bring-up, or IP release
  • Comfortable working with cross-functional teams and translating technical detail into status and trade-offs
  • Organized, proactive communicator who can hold own in engineering discussions
  • Exposure to Functional Safety (FuSa) standards, especially ISO 26262, is a plus
remote policy
Hybrid, based out of Austin, TX or Santa Clara, CA
hiring process
Candidates will be assessed for the appropriate level during the interview process, with offers aligned to that level.

Lab profile

About Tenstorrent

Builds high-performance RISC-V CPUs and AI accelerators with full-stack software for efficient AI computing.

What they build

  • AI accelerators
  • RISC-V CPUs
  • AI software and compilers

Known for

  • Custom RISC-V CPU development from scratch
  • Full-stack AI hardware and software
  • Performance, ease of use and cost efficiency

Key facts

  • Founded in 2016
  • Headquartered in Toronto, Canada
  • Backed by Samsung and Hyundai Motor Group
More about Tenstorrent →
Apply on the lab’s site ↗