Midcore Design Verification Engineer
Tenstorrent · Santa Clara, California, United States; Spain · North America · Spain
CHECKED 22H AGO
Infrastructureonsite$100k–$500k
At a glance
Highlights
- Verify next-generation high-performance RISC-V CPU cores.
- Own verification tasks from test plans to debug and closure.
- Help build next-generation CPUs designed for AI and HPC systems.
Ideal candidate
A hands-on, curious problem-solver fascinated by how CPUs work who enjoys finding elusive bugs, taking ownership, and collaborating across architecture and design to tackle complex processor challenges.
Requirements
- 6+ years of experience in design verification for CPUs, SoCs, ASICs, or other complex digital designs
- Strong experience with SystemVerilog and UVM, including testbench development, constrained-random testing, assertions, and functional coverage
- Understanding of CPU architecture and/or microarchitecture, including pipelines, out-of-order execution, caches, load/store, branch prediction, or instruction scheduling
- Experience debugging RTL and simulation failures using waveforms and common simulation/debug tools
- Strong C/C++ or Python skills and ability to work with RTL designers, architects, and verification engineers
- remote policy
- Remote based out of North America or Spain
- hiring process
- Candidates will be assessed for the appropriate level during the interview process, with offers aligned to that level.
Lab profile
About Tenstorrent
Builds high-performance RISC-V CPUs and AI accelerators with full-stack software for efficient AI computing.
What they build
- AI accelerators
- RISC-V CPUs
- AI software and compilers
Known for
- Custom RISC-V CPU development from scratch
- Full-stack AI hardware and software
- Performance, ease of use and cost efficiency
Key facts
- Founded in 2016
- Headquartered in Toronto, Canada
- Backed by Samsung and Hyundai Motor Group