Mixed Signal IC Layout Engineer
Tenstorrent · Santa Clara, California, United States · United States
CHECKED 22H AGO
Infrastructureonsite$100k–$500k
At a glance
Highlights
- Own full-custom layout of high-speed analog blocks for next-gen AI silicon.
- Integrate high-speed analog IP into a complex D2D PHY for AI systems.
- Turn schematics into manufacturable layouts meeting power and reliability goals.
What they offer
- Highly competitive compensation package and benefits
Ideal candidate
Detail-oriented layout engineer who loves owning complex analog blocks independently and collaborating closely with designers to ship high-quality silicon for cutting-edge AI hardware.
Requirements
- Experienced analog/mixed-signal IC layout engineer with full-custom background on high-speed blocks
- Proficient with Synopsys Custom Compiler or Cadence Virtuoso for custom layout
- Proficient with Synopsys ICV or Siemens Calibre for DRC, LVS, ERC, DFM and Antenna verification
- Deep experience in CMOS/FinFET nodes, ideally TSMC or Samsung 12nm-2nm, with delivered silicon
- Strong grasp of EM/IR, ESD and latch-up in mixed-signal layouts
- Detail-oriented and organized, able to own complex blocks independently and collaborate with designers
- Typically BSEE or equivalent with ~10+ years in analog/mixed-signal layout
- remote policy
- Remote - anywhere in the United States
- hiring process
- Candidates will be assessed for the appropriate level during the interview process, with offers aligned to that level.
Lab profile
About Tenstorrent
Builds high-performance RISC-V CPUs and AI accelerators with full-stack software for efficient AI computing.
What they build
- AI accelerators
- RISC-V CPUs
- AI software and compilers
Known for
- Custom RISC-V CPU development from scratch
- Full-stack AI hardware and software
- Performance, ease of use and cost efficiency
Key facts
- Founded in 2016
- Headquartered in Toronto, Canada
- Backed by Samsung and Hyundai Motor Group