Physical Design Engineer, AI Accelerator IP
Tenstorrent · Austin, Texas, United States; Belgrade, Serbia; Toronto, Ontario, Canada · Austin · Belgrade · Toronto
CHECKED 22H AGO
Infrastructureonsitesenior$100k–$500k
At a glance
Highlights
- Own physical implementation of AI accelerator IP from synthesis to GDSII signoff.
- Harden RISC-V CPU and AI IP for external licensees on advanced nodes.
- Port IP blocks across foundries and nodes to hit varied PPA targets.
What they offer
- Highly competitive compensation package and benefits
Ideal candidate
Hands-on physical design owner with block-level tapeout experience who is driven by PPA outcomes and signoff quality. You collaborate closely with RTL owners and take pride in shipping customer-ready IP.
Requirements
- BS/MS/PhD in EE/ECE/CE/CS with 5+ years of block-level or IP-centric physical design through tapeout
- Expertise with Innovus, ICC2/FusionCompiler, PrimeTime and Tcl, Python, Perl scripting
- Deep understanding of advanced-node low-power design and signoff including UPF, STA, LEC
- Experience with floorplans, power grids, pin placement, clocking and IP integration collateral
- remote policy
- hybrid
- hiring process
- Candidates assessed for appropriate level during interview process
Lab profile
About Tenstorrent
Builds high-performance RISC-V CPUs and AI accelerators with full-stack software for efficient AI computing.
What they build
- AI accelerators
- RISC-V CPUs
- AI software and compilers
Known for
- Custom RISC-V CPU development from scratch
- Full-stack AI hardware and software
- Performance, ease of use and cost efficiency
Key facts
- Founded in 2016
- Headquartered in Toronto, Canada
- Backed by Samsung and Hyundai Motor Group