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← Tenstorrent

Sr. Engineer, SoC Design Verification

Tenstorrent · Austin, Texas, United States · Austin

CHECKED 23H AGO

Infrastructureonsitesenior$100k–$500k
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At a glance

Highlights

  • Lead pre-silicon verification of Beowulf SoC across compute, DDR and Fabric NoC.
  • Drive coverage closure and signoff for coherency, memory traffic and data movement.
  • Integrate pre-silicon verification with emulation and silicon bring-up strategies.

What they offer

  • Highly competitive compensation package and benefits

Ideal candidate

Deeply curious engineer passionate about SoC architecture and AI hardware who thrives in cross-functional collaboration. Proactive, detail-oriented problem-solver excited to own complex verification challenges from planning to silicon success.

Requirements

  • Expert in UVM, SystemVerilog, coverage-driven verification and assertions
  • Experienced verifying compute subsystems, DDR controllers and PHY-facing logic
  • Experienced with NoC/interconnect protocols, coherency, ordering and data movement
  • Comfortable with reset, power management, error handling and high-concurrency scenarios
  • Familiar with Python, C/C++, Tcl, CocoTB or similar verification automation tools
  • Proactive, detail-oriented and effective in cross-functional technical discussions
remote policy
hybrid
hiring process
Candidates will be assessed for the appropriate level during the interview process and offers will align with that level.

Lab profile

About Tenstorrent

Builds high-performance RISC-V CPUs and AI accelerators with full-stack software for efficient AI computing.

What they build

  • AI accelerators
  • RISC-V CPUs
  • AI software and compilers

Known for

  • Custom RISC-V CPU development from scratch
  • Full-stack AI hardware and software
  • Performance, ease of use and cost efficiency

Key facts

  • Founded in 2016
  • Headquartered in Toronto, Canada
  • Backed by Samsung and Hyundai Motor Group
More about Tenstorrent →
Apply on the lab’s site ↗