Sr. Staff Engineer, CPU (Front-End) Verification

Highlights

• Verify unit-level RISC-V CPU front end including fetch and prediction.
• Build testbenches and checkers for complex microarchitectural scenarios.
• Work on high-performance RISC-V fetch pipelines and prediction structures.

Ideal candidate

Collaborative engineer excited by CPU microarchitecture who enjoys untangling fetch and prediction edge cases alongside designers and takes pride in building clean, maintainable verification environments.

Requirements

• Solid background verifying CPU front-end blocks such as instruction fetch, branch predictors, caches/TLBs, or decode
• Hands-on experience building clean, controllable unit testbench environments with precise stimulus and checking
• Experience building reusable transactors, predictors, and scoreboards across verification levels
• Comfortable working with RTL designers to trace and fix misspeculation, redirect and fetch edge-case bugs
• Experience developing constrained-random and directed tests and tracking coverage to closure