ASIC Design Verification Engineer

Highlights

• Build verification for custom silicon powering fully autonomous vehicles.
• Validate high-performance automotive compute pushing power and latency limits.
• Work on tech behind 10M+ rider-only trips and 100M autonomous miles.

What they offer

• Discretionary annual bonus program
• Equity incentive plan
• Generous Company benefits program

Ideal candidate

Curious, analytical verification engineer who thrives debugging complex hardware-software interactions and collaborating across teams on mission-critical silicon. Passionate about safe autonomy and establishing best practices.

Requirements

• 3+ years of experience building and maintaining complex testbenches using UVM/SystemVerilog
• Proven track record with constrained-random generation, functional coverage, and SVA
• Deep understanding of complex digital logic and debugging hardware/software interactions
• Proficiency in Python for automation frameworks, data analysis, and regression management
• Excellent verbal and written communication skills and cross-functional collaboration
• Strong analytical skills in root-causing failures across RTL, testbench, and environment layers