Hardware Engineering

Agility Robotics · Hybrid- Fremont, CA +1 · Hybrid · Oct 1

Lead next-gen humanoid hardware from concept to mass production and GA.

Agility Robotics · Hybrid- Fremont, CA +1 · Hybrid · Jun 26

Prototype future humanoid subsystems for warehouses and factories.

Periodic Labs · Menlo Park, CA · Onsite · Jul 16

Build structural and thermal simulation for semiconductor systems and materials.

Periodic Labs · Menlo Park, CA · Onsite · Aug 5

Build an autonomous laboratory for high-throughput materials discovery.

Periodic Labs · Menlo Park, CA · Onsite · May 8

Own end-to-end powder synthesis lab powering AI materials discovery.

Architect Labs · Palo Alto · Onsite · Aug 17

Own formal foundations giving AI-generated hardware rigor for production silicon.

Architect Labs · Bangalore, India · Onsite · Jul 22

Own verification strategy for AI-generated designs taping out on leading foundries.

Architect Labs · Palo Alto +1 · Onsite · Apr 16

Own microarchitecture and RTL for mission-critical SoC blocks in production silicon.

Architect Labs · Palo Alto · Onsite · Sep 14

Build the PD function from scratch and take chips from netlist to tapeout-ready GDS.

Architect Labs · Palo Alto · Onsite · Aug 3

Own verification strategy for AI-generated designs taping out on leading foundries.

Architect Labs · Palo Alto · Onsite · Apr 23

Build AI agents that reason about, generate, and verify real silicon.

Architect Labs · Palo Alto +1 · Onsite · Aug 12

Own memory subsystem RTL end-to-end for production custom silicon.

Tenstorrent · Santa Clara, California, United States +1 · Onsite · Feb 12

Design and integrate multiple chiplets into a System-in-Package solution.

Tenstorrent · 新北市, New Taipei City, Taiwan +1 · Onsite · Sep 23

Lead design and validation of manufacturing tools for high-performance AI hardware.

Tenstorrent · Belgrade, Serbia +1 · Onsite · May 29

Design driver layer providing high-performance APIs for AI devices.

Tenstorrent · Austin, Texas, United States; Toronto, Ontario, Canada +2 · Onsite · Oct 9

Define runtime architecture controlling execution across custom silicon IP.

Tenstorrent · Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada +1 · Onsite · Jul 2025

Shape the CPU architecture at the heart of next-generation AI compute platform.

Tenstorrent · Santa Clara, California, United States +1 · Onsite · Sep 28

Own post-silicon lab infrastructure for next-gen RISC-V CPU architectures.

Tenstorrent · Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States +1 · Onsite · May 1

Drive full-chip signoff to deliver manufacturable, high-quality AI silicon.

Tenstorrent · Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States +3 · Onsite · Apr 16

Drive top-level implementation of complex AI and CPU System-on-Chip designs.

Tenstorrent · Austin, Texas, United States; Boston, Massachusetts, United States; Santa Clara, California, United States; Toronto, Ontario, Canada +1 · Onsite · Jul 2025

Building next-generation high-performance AI compute systems from scratch.

Tenstorrent · Munich, Germany · Onsite · Mar 2

Build scalable emulation for chiplet-based AI engines from the ground up.

Tenstorrent · Santa Clara, California, United States; Spain +1 · Onsite · Aug 10

Drive architecture of RISC-V vector, floating-point and matrix execution units.

Tenstorrent · Santa Clara, California, United States +1 · Onsite · Sep 10

Define RTL-to-GDS methodology for high-performance CPU cores.

Tenstorrent · Boston, Massachusetts, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States; Toronto, Ontario, Canada +4 · Onsite · Aug 26

Validate System Management Controller for multi-chip integration.

Tenstorrent · Santa Clara, California, United States +1 · Onsite · Jun 30

Lead DFT for high-speed CPU cores in multi-chiplet System-in-Package programs.

Tenstorrent · Austin, Texas, United States; Belgrade, Serbia; Toronto, Ontario, Canada +3 · Onsite · Aug 4

Own RTL-to-GDSII methodology powering AI IP physical design delivery.

Tenstorrent · Munich, Germany · Onsite · Mar 2

Designing the central compute chiplet powering next-gen automotive SoC.

Tenstorrent · Toronto, Ontario, Canada +1 · Onsite · Aug 27

Lead firmware development from early architecture and bring-up to production.

Tenstorrent · Santa Clara, California, United States +1 · Onsite · Sep 2025

Shape the future of high-performance AI and HPC systems from software to silicon.